A display device is an essential user interface for many types of electronic devices. Among a variety of display devices, a liquid crystal display (LCD) is often used since it meets several requirements, namely that the electronic device be light, thin, short and small and consume minimum power.
Particularly in recent years, liquid crystal displays have been utilized not only for small and lightweight portable type electronic devices but also in computer or television displays, because of their space-saving and power-saving characteristics.
FIG. 5 is a block diagram schematically showing a configuration of a conventional liquid crystal display module. As shown in FIG. 5, the liquid crystal display module includes a liquid crystal power supply circuit 100, a reference potential generating circuit 150, a source driver 160, a scan driver 170 and a liquid crystal display panel 180. The module generally also includes a controller for generally controlling these components and a backlight unit (not shown in FIG. 5).
The liquid crystal power supply circuit 100 generates a drive power supply voltage Vdcdc supplied to the source driver 160, and a highest-level reference potential VrefH supplied to the reference potential generating circuit 150. The reference potential generating circuit 150 generates a plurality of reference potentials Vref0 to Vrefn required for generating a gray-scale voltage in the source driver 160; this may be done by using a resistor dividing network based on the highest-level reference potential VrefH supplied by liquid crystal power supply circuit 100.
The source driver 160 includes (1) a latch circuit 166 for latching digital image data D0 to Dm inputted thereto from the outside with the drive power supply voltage Vdcdc supplied from the liquid crystal power supply circuit 100; (2) a D/A converter 164 for converting the digital image data D0 to Dm, latched by the latch circuit 166, into analog signals by using the reference potentials Vref0 to Vrefn from the reference potential generating circuit 150; and (3) an output circuit 162 for buffering and outputting the analog signals outputted from the D/A converter 164 as a plurality of analog image signals Y0 to Yk.
A scan driver 170 outputs scan signals X0 to Xi in a specified cycle. A liquid crystal display panel 180 has a plurality of pixel cells arrayed in a matrix. The liquid crystal display panel 180 may be (for example) an active matrix drive type display, in which ON/OFF of each pixel cell is controlled by a thin film transistor (TFT). The liquid crystal display panel 180 displays an image determined by the analog image signals Y0 to Yk of the source driver 160 and the scan signals X0 to Xi of the scan driver 170.
As described above, in the conventional liquid crystal display module, the plurality of reference potentials Vref0 to Vrefn must be supplied to the source driver 160. In addition, the source driver 160 calculates an analog image signal having a certain size by applying the reference potentials Vref0 to Vrefn and the digital image data D0 to Dm to show a gray-scale degree of each pixel cell, in accordance with a specified equation.
The reference potential generating circuit 150 generates the reference potentials Vref0 to Vrefn based on the highest-level reference potential VrefH. This highest-level reference potential VrefH outputted from the liquid crystal power supply circuit 100, therefore determines the size of the maximum analog image signal inputted to the liquid crystal display panel 180.
In general, the maximum voltage that the source driver 160 can output has an upper limit given by subtracting the voltage required by the output circuit 162 for the driver from the drive power supply voltage Vdcdc. If the drive power supply voltage Vdcdc is unstable, then the maximum voltage that the power supply can output is likewise unstable. In particular, in the source driver 160, the maximum voltage capable of being outputted and the maximum analog image signal outputted to the liquid crystal display panel 180 approximately coincide with each other in voltage.
Accordingly, the drive power supply voltage Vdcdc and the highest-level reference potential VrefH, which are both generated in the power supply circuit 100, are required to be stable with high precision; in general, the performance of the liquid crystal power supply circuit 100 determines the quality of the entire liquid crystal display module.
A more detailed description of the configuration and operation of the conventional liquid crystal power supply circuit 100 is as follows. The drive power supply voltage Vdcdc and the highest-level reference voltage VrefH for the source driver 160 are required to be voltages determined by the design of the liquid crystal display panel 180 or by a property of the liquid crystal material. These voltages are different from a power supply voltage Vcc required for driving the liquid crystal power supply circuit 100 itself. Therefore, in the liquid crystal power supply circuit 100, in order to generate the drive power supply voltage Vdcdc from the power supply voltage Vcc, a DC/DC converter is used in many cases. The drive power supply voltage Vdcdc and the highest-level reference voltage VrefH may then be set to have higher values than that of the power supply voltage Vcc of the liquid crystal power supply circuit 100. Accordingly, the liquid crystal power supply circuit 100 includes a boost type DC/DC converter 130 and a DC/DC converter control circuit 120 for controlling the DC/DC converter 130 in order to generate the drive power supply voltage Vdcdc for the source driver 160.
The DC/DC converter control circuit 120 includes a pulse width modulation (PWM) conversion unit 122, an internal reference voltage generating unit 124 and an error amplifying unit 126. The liquid crystal power supply circuit 100 also includes resistors R11 and R12 for dividing an internal reference voltage VREF generated by the internal reference voltage generating unit 124, and resistors R13 and R14 for dividing the drive power supply voltage Vdcdc outputted from the DC/DC converter 130.
The error amplifying unit 126 has a non-inverted input given by the voltage obtained by dividing the internal reference voltage VREF with the dividing network of resistors R11 and R12, and an inverted input given by the voltage obtained dividing the drive power supply voltage Vdcdc with the dividing network of resistors R13 and R14; the error amplifying unit 126 outputs a voltage in accordance with the difference between these voltages. The PWM conversion unit 122 outputs an oscillation signal Vout having a pulse width in accordance with the difference voltage outputted from the error amplifying unit 126.
Therefore, if the resistance values of resistors R11, R12, R13 and R14 are chosen so that the voltage obtained by the resistor dividing network of R13 and R14 and the voltage obtained by the resistor dividing network of R11 and R12 are equal when the drive power supply voltage Vdcdc has a target value, then it is possible to realize feedback control for setting at zero, a difference between this target value and the drive power supply voltage Vdcdc actually outputted. Using this feedback control, the liquid crystal power supply circuit 100 can output a stable drive power supply voltage Vdcdc coincident with the target value.
In addition, the liquid crystal power supply circuit 100 includes a stabilized power supply circuit 140. The stabilized power supply circuit 140 is a power supply regulator having a tolerance of, for example, 2% in the generated voltage. The stabilized power supply circuit 140 generates the highest-level reference potential VrefH from the power supply voltage Vcc of the liquid crystal power supply circuit 100.
Note that the highest-level reference voltage VrefH can be generated not only by the stabilized power supply circuit 140 as shown in FIG. 5, but also by dividing the drive power supply voltage Vdcdc outputted from the DC/DC converter 130 of the liquid crystal power supply circuit 100 in a resistor dividing network. FIG. 6 is a diagram showing an example of a liquid crystal display module when the highest-level reference potential VrefH is generated by a resistor dividing network. In FIG. 6, illustration of the components other than those corresponding to the liquid crystal power supply circuit 100 shown in FIG. 5 is omitted.
In a liquid crystal power supply circuit 200 shown in FIG. 6, VrefH is the voltage obtained by dividing the drive power supply voltage Vdcdc outputted from the DC/DC converter 130 in a resistor dividing network of resistors R21 and R22. This eliminates the need for the stabilized power supply circuit 140 shown in FIG. 5.
In the conventional liquid crystal display module described above, the maximum gray-scale voltage of the source driver 160 is determined by the highest-level reference potential VrefH, the maximum voltage that the source driver 160 can output is limited to a value somewhat lower than the drive power supply voltage Vdcdc, and the maximum voltage that the source driver 160 must output usually coincides with the voltage of the highest-level reference potential VrefH. Therefore, the drive power supply voltage Vdcdc must be higher than the highest-level reference potential VrefH by a certain size.
However, the source driver 160 cannot receive a drive power supply voltage above a specified maximum value. For this reason, in the actual design of the liquid crystal display module, the maximum voltage that the source driver 160 must output (that is, the voltage of the highest-level reference potential VrefH) is set approximately equal to the drive power supply voltage of the source driver 160.
FIG. 7 shows typical voltage values in a conventional liquid crystal power supply circuit. It is assumed here that the maximum voltage the source driver 160 must output is equal to the voltage of the highest-level reference potential VrefH and that the minimum voltage difference required between the maximum voltage and the drive power supply voltage Vdcdc of the source driver 160 (hereinafter, referred to as an upper rail voltage) is 0.2 V.
In the example of FIG. 7, it is also assumed that an upper limit of the power supply voltage that can be inputted to the source driver 160 is 16.00 V and that a designed central value of the highest-level reference potential VrefH is 15.00 V. It is also assumed that a high-precision power supply regulator having a tolerance of 2% in the generated voltage is used as the stabilized power supply circuit 140. Accordingly, as shown in FIG. 7, the maximum value of the highest-level reference potential VrefH becomes 15.30 V (=15.00×1.02), and the minimum value thereof becomes 14.70 V (=15.00×0.98).
As described above, since the drive power supply voltage Vdcdc supplied to the source driver 160 is required to be larger than the highest-level reference potential VrefH by an amount of the upper rail voltage, the drive power supply voltage Vdcdc is required to be set at least at 15.50 V, which is larger than 15.30 V by 0.2 V. 15.30 V is the maximum value of the highest-level reference potential VrefH.
Consequently, in this example, a liquid crystal power supply circuit 100 which generates a drive power supply voltage Vdcdc in a range of 15.50 V to 16.00 V is required. In other words, in the liquid crystal power supply circuit 100, a high-precision voltage generating circuit having a tolerance of 1.59% in the generated voltage at the designed central voltage of 15.75 V is required. This means that the internal reference voltage generating unit 124 in the DC/DC converter control circuit 120 generates an internal reference voltage VREF having a tolerance of 1.59% in the generated voltage. An internal reference voltage generating unit 124 with such high precision is costly and is not suitable for mass production.
Typically, in an inexpensive DC/DC converter control circuit 120 equipped with an IC, the tolerance of the generated voltage in the internal reference voltage generating unit 124 is about 4%. As a second example of the liquid crystal power supply circuit, a liquid crystal power supply circuit 100 will be described which includes such an inexpensive DC/DC converter control circuit 120.
FIG. 8 shows typical voltage values in this second example of a conventional liquid crystal power supply circuit. As in the first example, it is assumed that (1) the maximum voltage the source driver 160 must output is equal to the highest-level reference potential VrefH; (2) the upper rail voltage is 0.2 V; and (3) the tolerance of the generated voltage (VrefH) in the stabilized power supply circuit 140 is 2%. In addition, it is assumed that the upper limit of the power supply voltage of the source driver 160 is 16.00 V, and that the tolerance of the generated voltage (Vdcdc) in the liquid crystal power supply circuit 100 (and thus the tolerance of the generated voltage VREF in the internal reference voltage generating unit 124) is 4%.
In this case, as shown in FIG. 8, the maximum value of the drive power supply voltage Vdcdc becomes 16.00 V, and a designed central voltage thereof is calculated to be about 15.38 V (=16.00/1.04), and the minimum value thereof is calculated to be about 14.77 V (=15.38×0.96). The upper rail voltage is 0.2 V. From these values, the maximum value of the highest-level reference potential VrefH is obtained as 14.57 V by subtracting 0.2 V of the upper rail voltage from 14.77 V (that is, the minimum value of the drive power supply voltage Vdcdc). Furthermore, the tolerance of the generated voltage in the stabilized power supply circuit 140 is 2%. Therefore, the designed central voltage of the highest-level reference potential VrefH is calculated to be about 14.28 V (=14.57/1.02), and the minimum value thereof is calculated to be about 14.00 V (=14.28×0.98).
Therefore, according to this trial calculation, since the designed central voltage of the highest-level reference potential VrefH is about 14.28 V, the liquid crystal power supply circuit 100 cannot give a sufficiently large highest-level reference potential VrefH to the reference potential generating circuit 150. In other words, in order to carry out an image display in response to the specification of the liquid crystal display panel 180, the boosting capability of the DC/DC converter 130 and the upper limit of the power supply voltage of the source driver 160 of the liquid crystal power supply circuit 100 must be increased, resulting in an increase of the cost for manufacturing the liquid crystal display module.
If the difference between the drive power supply voltage Vdcdc and the highest-level reference potential VrefH is lowered to the upper rail voltage or less, and if the designed central voltage of the highest-level reference potential VrefH is increased in order to secure a sufficiently large highest-level reference potential VrefH, then an undesirable gap will exist between the maximum output voltage of the source driver 60 and the designed value; an unwanted offset voltage may thus be added to the analog image signal outputted to the liquid crystal display panel 180.
Note that, in the trial calculations according to the above-described first and second examples, no consideration has been given to tolerances in the resistors R11, R12, R13 and R14 externally attached to the DC/DC converter control circuit 120 and the DC/DC converter 130, or to dynamic voltage variations caused by load variations in the power supply. In the circuits described above, high-precision resistors are actually required in consideration of the specified tolerances. Therefore, the specifications for the liquid crystal power supply circuit 100 become stricter.
In the circuit of FIG. 6, in which the highest-level reference potential VrefH is generated from the drive power supply voltage Vdcdc by a resistor dividing network, a relation between the drive power supply voltage Vdcdc and the highest-level reference potential VrefH can be readily established. However, in this case, a voltage variation amount originating from the load variation of the drive power supply voltage Vdcdc also appears in the highest-level reference potential VrefH, which will then cause deterioration of the image quality.